18/04/2024 | Fulltime | Hertfordshire | CV-LibraryIn the majority of the following areas Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor
Save for laterRegister your CV17/04/2024 | Fulltime | Kings Langley | CV-Library | £35,000 - £75,000 / Year Projects. To be successful in this role you’ll need - A BSc/MSc/PhD in EEE/Maths/Physics - Fluency in at least one of VHDL/Verilog/Systemverilog - Ideally a Linux/Unix background It would be great if you also had - Knowledge of RISC-V/Arm/x86 - Experience in ML or AI - An understanding at least one
Save for laterRegister your CV17/04/2024 | Fulltime | Cambridge | CV-Library | £600 - £800 Specifications into RTL designs with accompanying verification environments. These designs will then be incorporated into SoC and reference designs before being tested and delivered to their prototyping teams. Key Requirements Experienced in the RTL design using Verilog and/or System Verilog for ASIC
Save for laterRegister your CV16/04/2024 | Fulltime | City of Westminster, Aberdeen | CV-Library | £50,000 - £60,000 / Year That are well established and boast an impressive list of clients such as Meta and other silicon valley giants. Skills - 3+ Years experience in a similar position - Experience in Optics is advantageous - Coding in Verilog for RTL design - RTL Specification, design, integration and validation - Experience
Save for laterRegister your CV16/04/2024 | Fulltime | Cambridge | CV-Library | £36,000 - £55,000 / Year With flight heritage sub-systems. Contributed to Test plan development. Experience with reviewing/maintaining documents such as Software Requirements & Specification (SRS), Software Architecture, and API documentation. VHDL and/or Verilog development experience in the context of Xilinx or Altera FPGAs
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryVerification strategy. Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. You will also contribute to developing and improving the verification methodologies used by the team. In addition, you'll work
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryDesign tasks to meet the targets at the planned time Required Skills and Experience Hands-on experience using System Verilog, Verilog or VHDL HDL for design Experience in synthesisable design that achieve area, frequency and power targets with the ability to make judgements on functionality, performance
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryMicro-architectural concepts Knowledge of hardware description and verification languages, such as VHDL, Verilog/SystemVerilog Ability to understand and map abstract formal concepts into designs 'Nice to have' skills and experience Experience with industry-standard formal verification tools and model
Save for laterRegister your CV15/04/2024 | Fulltime | Tadworth | CV-LibraryIEC(phone number removed), 4-20mA, Modbus, PROFINET, M-Bus, SDI-12, WITS, DNP3 Additional Knowledge - Experience Experience with HDL languages such as Verilog, VHDL, and SystemC. Good understanding of software languages and integration processes. Exceptional attention to detail and precision
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryAn understanding of ASIC/SoC prototyping, which features can and cannot be implemented in FPGA. Excellent written and spoken English; ability to write coherent documentation. “Nice To Have” Skills and Experience Strong RTL skills in either (System) Verilog or VHDL. Knowledge and expertise in debugging
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