17/05/2024 | Fulltime | Hertfordshire | CV-LibraryOr Cyclone device families. - DSP Algorithm implementation in Verilog. - Extensive experience writing FPGA test benches. The Principal FPGA Engineer role Reporting to the Digital RF Lead, the successful Principal FPGA Engineer will be responsible for designing, developing and testing digital intermediate
Save for laterRegister your CV22/04/2024 | Fulltime | Hertfordshire | CV-LibraryPackage on offer. The Role and Responsibilities The successful RF Team Leader - Principal Engineer will lead and undertake hands-on RF Circuit design and development for a range of products covering a broad range of frequencies from DC up to Ka-band; using your experience to guide RF designs to achieve
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