24/04/2024 | Parttime | Cambridge | CV-LibraryExperience with Model-Based System Engineering, ISO 15288, MagicGrid Framework, SysML 2.0 Functional, HW, and SW Architecture Modelling. Solid understanding of Requirements Management and Traceability tools. Familiar with Verilog, VHDL, Assembler, C, C+, AUTOSAR. Exposure to projects developing automotive
Save for laterRegister your CV24/04/2024 | Fulltime | Cambridge | CV-Library | £65,000 - £85,000 / Year System Verilog code - Worked with EDA tools such as Quartus or Vivado - Experience optimising RTL designs - Experience with C/C+ or other coding languages e.g. Python - Experience working in a Linux development environment - A strong degree (MSc or PHD ideally) in Engineering or Computer Science
Save for laterRegister your CV24/04/2024 | Fulltime | Cambridge | CV-Library | £65,000 - £80,000 / Year Is not required, any knowledge in this area would be beneficial. Requirements • Commercial experience of PCB design (schematic capture, layout, and simulation) for both analogue and digital circuits, ideally using Altium Designer • FPGA or PLD design knowledge using Verilog or VHDL • Proficiency with bench level
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £60,000 - £100,000 / Year For mixed signal ASICs. Strong experience with modelling and verification for ASIC implementation. Experience in custom bench testing with System Verilog and Verilog-A. Knowledge of mixed signal circuitry Analogue to Digital & Digital to analogue convertor design, Switching amplifiers & Oscillators. EDA
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £45 - £70 / Hour With Verilog and System rate Up to £70ph DOE
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £45 - £70 / Hour Verilog and SystemVerilog models for simulation, synthesis and static timing analysis and writing automated simulation and verification build scripts. Building automated pre-silicon verification environment whilst supporting early development of embedded firmware throughout start of project. Integrate
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £60,000 - £100,000 / Year Design Engineers with a digital bias to deliver industry leading IC RTL Design and technical mentoring to a highly skilled, close-knit team. Key Responsibilities Digital design development for custom IC Integration including the writing of IP design specifications, coding Verilog and SystemVerilog
Save for laterRegister your CV17/04/2024 | Fulltime | Cambridge | CV-Library | £600 - £800 Specifications into RTL designs with accompanying verification environments. These designs will then be incorporated into SoC and reference designs before being tested and delivered to their prototyping teams. Key Requirements Experienced in the RTL design using Verilog and/or System Verilog for ASIC
Save for laterRegister your CV16/04/2024 | Fulltime | Cambridge | CV-Library | £36,000 - £55,000 / Year With flight heritage sub-systems. Contributed to Test plan development. Experience with reviewing/maintaining documents such as Software Requirements & Specification (SRS), Software Architecture, and API documentation. VHDL and/or Verilog development experience in the context of Xilinx or Altera FPGAs
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryVerification strategy. Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. You will also contribute to developing and improving the verification methodologies used by the team. In addition, you'll work
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