17/04/2024 | Fulltime | Cambridge | CV-LibraryHours and offshore opportunities. As Senior ASIC Layout Engineer, you will play a crucial role in the design and development of cutting-edge oscillator ASICs. You will be collaborating closely with design teams to translate designs into silicon. Performing layout of blocks within ASICs, considering
Save for laterRegister your CV17/04/2024 | Fulltime | Cambridge | CV-LibraryTeams across the globe to optimise ASIC architecture and devising circuit solutions for the complex and intellectually challenging functions. To be a good fit for this ASIC design role, you should have strong analog design experience with a proven track record in delivering high-performance full ASICs
Save for laterRegister your CV17/04/2024 | Fulltime | Cambridge | CV-Library | £600 - £800 Design & Verification Engineer – ASIC - FPGA 6 Month Contract Inside of IR35 Rate £600 - £800 pd Location Cambridge Working Environment Hybrid (2/3 days on-site) The company is one of the most prestigious tech firms in the world and a global powerhouse in the semiconductor industry, operating
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £60,000 - £100,000 / Year For mixed signal ASICs. Strong experience with modelling and verification for ASIC implementation. Experience in custom bench testing with System Verilog and Verilog-A. Knowledge of mixed signal circuitry Analogue to Digital & Digital to analogue convertor design, Switching amplifiers & Oscillators. EDA
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £45 - £70 / Hour Architecture experience for mixed signal ASICs. Strong experience with modelling and verification for ASIC implementation. Experience in custom bench testing with System Verilog and Verilog-A. Knowledge of mixed signal circuitry Analogue to Digital & Digital to analogue convertor design, Switching amplifiers
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £45 - £70 / Hour In digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on-chip bus protocol (AMBA AHB, APB
Save for laterRegister your CV23/04/2024 | Fulltime | Cambridge | CV-Library | £60,000 - £100,000 / Year Custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on-chip bus protocol (AMBA AHB, APB, AXI
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryAn understanding of ASIC/SoC prototyping, which features can and cannot be implemented in FPGA. Excellent written and spoken English; ability to write coherent documentation. “Nice To Have” Skills and Experience Strong RTL skills in either (System) Verilog or VHDL. Knowledge and expertise in debugging
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibraryFor complex ASIC products & SoCs using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Knowledge or experience with Functional Safety concepts and standards (e.g., ISO 26262, IEC 61508). Should have worked on an Automotive IP or SoC from definition to completion
Save for laterRegister your CV15/04/2024 | Parttime | Cambridge | CV-LibrarySilicon into volume production Gained some exposure to digital ASIC front and backend design & verification processes Hands-on Synthesis and Static Timing Analysis (STA) experience Familiarity with current mobile SOC architectures and low power design practices would be an advantage Understanding
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